Application-Specific Integrated Circuits (ASICs) are widely used in various computing environments. Intellectual property (IP) cores are reusable units of logic, cell, or chip layout designs that can be used as building blocks within ASIC chip designs. A particular IP core can be used in multiple different ASIC chip designs.
Semiconductor design model libraries may be developed in parallel along with IP cores, ASICs, and other technologies. When changes to design models and/or ground rules occur, IP cores may need to be correspondingly updated. Updates to an IP core can potentially cause disturbance in the development of in-flight ASICs that use the IP core. For example, updates to an IP core may necessitate the need to redesign the ASICs that use the IP core. As a result, time-to-market can be negatively impacted as a result of redesigning the ASICs.
Since different ASICs are subject to different constraints based on their applications, e.g., power constraints, temperature constraints, timing slack constraints, etc., updates to an IP core should be made with consideration to all of the different constraints for all of the ASIC designs in which the IP core is used, in order to minimize the impact to the ASIC designs. For example, if an IP core is updated with consideration to all of the different constraints for all of the ASIC designs, changes to the ASIC designs may only be minimally necessary, or may not be necessary at all.